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8th IEEE EAST-WEST DESIGN & TEST SYMPOSIUM
(EWDTS 2010)

September 17-20, 2010
St. Petersburg, Russia

http://www.ewdtest.com/conf/

CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information -- Committees

Scope

The main target of the IEEE East-West Design & Test Symposium (EWDTS) is to exchange experiences between scientists and technologies of Eastern and Western Europe, as well as North America and other parts of the world, in the field of design, design automation and test of electronic circuits and systems. The symposium is typically held in countries around the Black Sea, the Baltic Sea and Central Asia region. We cordially invite you to participate and submit your contributions to EWDTS’10 which covers (but is not limited to) the following topics:

  • Analog, Mixed-Signal and RF Test
  • Analysis and Optimization
  • ATPG and High-Level Test
  • Built-In Self Test
  • Debug and Diagnosis
  • Defect/Fault Tolerance and Reliability
  • Design for Testability
  • Design Verification and Validation
  • EDA Tools for Design and Test
  • Embedded Software Performance
  • Failure Analysis, Defect and Fault
  • FPGA Test
  • HDL in test and test languages
  • High-level Synthesis
  • High-Performance Networks and Systems on a Chip
  • Low-power Design
  • Memory and Processor Test
  • Modeling & Fault Simulation
  • Network-on-Chip Design & Test
  • Modeling and Synthesis of Embedded Systems
  • Object-Oriented System Specification and Design
  • On-Line Testing
  • Power Issues in Design & Test
  • Real Time Embedded Systems
  • Reliability of Digital Systems
  • Scan-Based Techniques
  • Self-Repair and Reconfigurable Architectures
  • Signal and Information Processing in RF and Communication
  • System Level Modeling, Simulation & Test Generation
  • System-in-Package and 3D Design & Test
  • Using UML for Embedded System Specification
  • CAD and EDA Tools, Methods and Algorithms
  • Design and Process Engineering
  • Logic, Schematic and System Synthesis
  • Place and Route
  • Thermal, Timing and Electrostatic Analysis of SoCs and Systems on Board
  • Wireless and RFID Systems Synthesis

Venue

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The Symposium will take place in St. Petersburg, Russia, one of the world's most beautiful cities, that has all the ingredients for an unforgettable experience: high art, lavish architecture, an extraordinary history and rich cultural. From the mysterious twilight of the White Nights to world-beating opera and ballet productions on magical winter evenings, St. Petersburg charms and entices in every season.  Also St. Petersburg is the city of science and high tech R&D.

Submissions

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Papers submission info: http://www.ewdtest.com/conf

The best papers of the Symposium will be published in IEEE Design & Test of Computers and Radioelectronics and Informatics Journal (ISSN 1563-0064). The Symposium will take place at the premises of St. Petersburg State Electrotechnical University «LETI».

Key Dates

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Submission deadline: June 30th, 2010
Notification of acceptance: August 1st, 2010

Additional Information
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Organizing Committee Address

Prof. Vladimir Hahanov
Design Automation Department
Kharkov National University of Radioelectronics
Lenin ave, 14
Kharkov, 61166
Ukraine

Tel.: +380-57-702-13-26
E-mail: hahanov@kture.kharkov.ua

Committees
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General Chairs
V.  Hahanov – Ukraine
Y. Zorian – USA

General Vice-Chairs
V.  Kutuzov – Russia
P.  Prinetto – Italy

Program Chairs
S.  Shoukourian – Armenia
D. Speranskiy – Russia

Program Vice-Chairs
Z. Navabi  – Iran
M. Renovell  – France

Publicity Chairs
R.  Ubar – Estonia
S.  Mosin – Russia

Program Committee
E. J. Aas – Norway
J.   Abraham – USA
M. Adamski – Poland
А. Barkalov – Poland
R.  Bazylevych – Ukraine
V.  Djigan – Russia
A. Drozd – Ukraine
E.  Evdokimov – Ukraine
A. Chaterjee – USA
E.  Gramatova – Slovakia
A. Ivanov – Canada
M. Karavay – Russia
V.  Kharchenko – Ukraine
K. Kuchukjan – Armenia
W. Kuzmicz – Poland
A. Matrosova – Russia
V. Melikyan  – Armenia
O. Novak – Czech Republic
Z.  Peng – Sweden
A. Petrenko – Ukraine
D.  Puzankov - Russia
J.   Raik – Estonia
A. Romankevich – Ukraine
A. Ryjov – Russia
R.  Seinauskas – Lithuania
S.  Sharshunov – Russia
A. Singh – USA
J.   Skobtsov – Ukraine
V.  Tverdokhlebov – Russia
V. Vardanian – Armenia
V.  Yarmolik – Byelorussia

Steering Committee
M. Bondarenko – Ukraine
V.  Hahanov – Ukraine
R.  Ubar – Estonia
Y. Zorian – USA

Organizing Committee
M. Shestopalov – Russia
S.  Chumachenko – Ukraine
N. Kulbakova – Ukraine
V.  Obrizan – Ukraine
E. Litvinova – Ukraine
O. Guz – Ukraine
S.  Shaposhnikov – Russia
A. Korotkov – Russia
G. Brandon – Luxembourg

For more information, visit us on the web at: http://www.ewdtest.com/conf/

The 8th IEEE East-West Design & Test Symposium (EWDTS 2010 ) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

ITC GENERAL CHAIR
Gordon W. ROBERTS
McGill University
- Canada
Tel. +1-514-398-6029
E-mail gordon.roberts@mcgill.ca

TEST WEEK COORDINATOR
Yervant ZORIAN
Virage Logic Corporation - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
K.T. (Tim) CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
STARC - Japan
Tel. +
E-mail hatayama.kazumi@starc.or.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
William R. MANN
SW Test Workshop - USA
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


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